-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Feb 12 06:18:50 2024 UTC
-- File 20240209_014318_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-09T01:43:21.000.000.000 to 2024-02-09T01:43:21.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240209_014318_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03B2BF70 026BE0C0 035E10A0 00F118F0 00899480 00CD5EC0 00ABF1A0 02FE0970 03810DC0 02418B20 00B0A750
      00B0A750 01747A70 01CE4740 012964E0 03BDD690 00633DD0 0252A330 037BF2A0 00C60BF0 00A50E00 00F78900
      00F78900 004626C0 02329AD0 012BD7B0 01BE3C60 03612250 00D1B370 00B96AC0 00E5DFA0 02973070 03DCA840
      03DCA840 0232FC60 0295C120 00EF90D0 029858B0 03D474E0 003E4E90 022169D0 0131DD30 01A933A0 037DAA70
      037DAA70 02C37F40 03A2C0E0 0239D040 03929C30 025BD220 01763B30 01CD26A0 032BB5F0 02BE6F00 03E15880
      03E15880 0211F4C0 03190EA0 009589F0 006FA680 002C3AE0 023A2790 01273450 03B4AE70 026EF940 035985E0
      035985E0 00F54710 028FE490 01C816D0 032C1DB0 035D09B0 0379C6B0 02C525E0 01A7B710 03746C90 00CE5AD0
      00CE5AD0 02A977B0 03FDCC60 00032A50 0202BF70 0303E0C0 03410850 0070C630 0048A520 026CF7B0 035A8C60
      035A8C60 00F7CA50 028C2F70 03CA38C0 022F24A0 0138B6F0 01A4ED80 00BB4DA0 017375B0 01CACF60 032FA8D0
      032FA8D0 00B87CB0 00E442E0
     
