-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Feb 12 05:51:33 2024 UTC
-- File 20240209_005829_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-09T00:58:32.000.000.000 to 2024-02-09T00:58:32.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240209_005829_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01BAC8E0 0367AC90 00D47AD0 02BE47B0 03E16460 0011D650 02193D70 0315A3C0 029F7220 01D0CB30 0138AEA0
      0138AEA0 03A4F9F0 02768500 01A6E3C0 02BAC910 01E7AD90 03147B50 009E46F0 00D16580 00B9D740 00E53CE0
      00E53CE0 0297A290 01DC73D0 03324A30 0355B790 027FB620 01406D30 01E05BA0 03107670 02984D40 03D46BE0
      03D46BE0 003E5E10 02217110 0131C990 03A92D50 003EDDF0 0010D980 0018B540 0014EFE0 021E9810 0111D410
      0111D410 03993E10 0055A110 027F7190 0140C950 03E0ADF0 01087D80 00C621A0 02A53170 03F7A9C0 020C7D20
      020C7D20 010A43B0 018F6260 0348D350 00ECBAF0 009AE780 00D79440 025E2F30 03B89C50 0064D270 0056BB40
      0056BB40 007DE6E0 02431590 01629F50 03D3D0F0 023A3880 032724C0 02B4B6A0 00F776F0 004666C0 006555A0
      006555A0 0257FF70 037C00C0 02C200A0 01A300F0 01728080 01CBC0C0 012E20A0 03B930F0 0132D440 02D5DF30
      02D5DF30 03BF30A0 0060A8F0 0050FC80 007882C0 0044C3A0 0266A270 0355F340 02FF0AE0 01808F90 03A06420
      03A06420 00382B10 02243E90
     
