-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Feb 12 05:26:19 2024 UTC
-- File 20240209_003124_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-09T00:31:27.000.000.000 to 2024-02-09T00:31:27.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240209_003124_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00ED3E90 029BA1D0 01D67130 013D49A0 03A3ED70 02721BC0 034B1620 00EE9D30 0099D3A0 02D53A70 03BFA740
      03BFA740 026074E0 01504E90 03F869D0 00045D30 000673A0 02054A70 0183F7A0 03420C70 02E30A40 03928F60
      03928F60 005BC8D0 02762CB0 034D3AE0 00EBA790 029E7450 01D14E70 009CF4A0 01694770 01DDE4C0 013316A0
      013316A0 03AA9DF0 027FD300 03403A80 02E027C0 03903420 00582E30 00743920 012712D0 01DA4DD0 03376B30
      03376B30 02ACDEA0 01FAB1F0 0107E900 01841D80 01461340 01E51AE0 03179790 009C5C50 01693930 02EED2D0
      02EED2D0 0199BBB0 01556660 03FFD550 00003FF0 00002000 00003000 00002800 00003C00 00002200 00001980
      00001980 00000AA0 02000FF0 03000800 02800C00 03C00A00 02200F00 03300880 02A80CC0 03FC0AA0 00020FF0
      00020FF0 00018400 0000A300 0000F280 00008BC0 0000CE20 0200A930 0300FDA0 00808370 00C0C2C0 00A0A3A0
      00A0A3A0 02F0F270 01C445A0 019333B0 015AAA60 03F7FF50 000C00F0 000A0080 000F00C0 000880A0 020CC0F0
      020CC0F0 030AA080 028FF0C0
     
