-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Feb 11 13:53:55 2024 UTC
-- File 20240207_095214_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-07T09:52:17.000.000.000 to 2024-02-07T09:52:17.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240207_095214_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  037C5BB0 02C27660 01A34D50 01B975F0 00B2E780 00EB9440 009E5E60 02D17150 01B9C9F0 01652D00 01D7BB80
      01D7BB80 013C6640 01A25560 03737FD0 00656010 032BE800 02BE1C00 03E11200 02119B00 03195680 0295FDC0
      0295FDC0 03DF0320 003082B0 0028C3E0 023CA210 02917980 01ECE2A0 031A93F0 0297DA00 03DC3700 02322C80
      02322C80 032B3AC0 02BEA7A0 01E1F470 01110E40 01998960 03AAA6E0 023FFAC0 032007A0 00B00470 00E80640
      00E80640 009C0560 02D207D0 01BB0430 01668620 03D5C530 023F27A0 00905A30 026C3B90 015A2650 03F73570
      03F73570 020CAFC0 030AF820 008F8430 00C84620 02AC6530 03FA57A0 00077C70 00026120 0101A8D0 03817CB0
      03817CB0 0241C2E0 01612390 03D1B250 00396B70 0025DEC0 003731A0 022CA970 033AFDC0 0353C190 027D10A0
      027D10A0 014398F0 01E25480 01137EC0 019AC1A0 0357A170 02FC71C0 03824920 00436DB0 0062DB60 0329DB60
      0329DB60 025E9B60 0171D6D0 03C93DB0 022DA360 013B72D0 03A6CBB0 0275AE60 014F7950 03E8C5F0 021CA700
      021CA700 01897A40 02A6E3B0
     
