-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Feb 11 12:24:34 2024 UTC
-- File 20240206_200827_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-06T20:08:30.000.000.000 to 2024-02-06T20:08:30.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240206_200827_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  024DD380 036B3A40 02DEA760 01B1F4D0 03690EB0 02DD89E0 01B34D10 036AEB90 026FCF20 00AC1450 02FA1E70
      02FA1E70 03871140 024499E0 0166D510 03D5BF90 003F6050 0220D070 0330B840 02A8E460 02FE4B20 00C0B750
      00C0B750 02A0ECF0 03F09A80 0208D7C0 030CBC20 008AE230 00CF9320 02A85AB0 03FC77E0 00024C10 0301B500
      0301B500 0140B7C0 01E0EC20 03109A30 0298D720 01D4BCB0 013EE2E0 03A19390 00715A50 0249F770 036D0CC0
      036D0CC0 036DC550 006D93F0 005B5A00 0076F700 004D8C80 006B4AC0 005EEFA0 02719870 03495440 02EDFE60
      02EDFE60 019B0150 01AB40F0 00BF7040 00E0C860 0290AC50 01D8FA70 01348740 01AEC4E0 0379A690 00C575D0
      00C575D0 02A7CF30 03F428A0 00071E70 000248A0 02036CF0 0302DA80 0283B7C0 03C26C20 00235A30 0032F720
      0032F720 022B8CB0 033E4AE0 00A16F90 0378EC20 00624D10 02536B90 017ADE50 03C7B170 022469C0 03365D20
      03365D20 00AD73B0 00FBCA60 02862F50 01C538F0 0093D240 026D1DB0 035B9360 00F65AD0 028D77B0 03CBCC60
      03CBCC60 002E2A50 02393F70
     
