-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Feb 11 07:29:49 2024 UTC
-- File 20240205_152835_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-05T15:28:38.000.000.000 to 2024-02-05T15:28:38.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240205_152835_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0373AA00 02CA7F00 03AF4080 0278E0C0 03A24850 0039B630 00256D20 0237DBB0 032C3660 00BA2D50 02E73BF0
      02E73BF0 0394A600 025EF500 03718F80 02C94840 03D6F630 031EC690 0091A5D0 02D97730 03B5CCA0 006F2AF0
      006F2AF0 0058BF80 0074E040 004E9060 0269D850 015D3470 00F9D720 01429E50 03E3D170 021239C0 031B2520
      031B2520 0096B7B0 00DDEC60 02B31A50 01EA9770 011FDCC0 019032A0 01AC15F0 00BD0F80 00E38840 00924C60
      00924C60 02DB6A50 01B6DF70 016DB0C0 01DB68A0 0336DCF0 02ADB280 03FB6BC0 03036F10 02416C40 0361DA60
      0361DA60 00D13750 02B9ACF0 03E57A80 0217C7C0 031C2420 00923630 00DB2D20 02B6BBB0 03F6F330 0306C550
      0306C550 0085A7F0 00C77400 00A4CE00 00F6A900 008DFD80 00CB0340 00AE82E0 02F9C390 01852250 01A3D9B0
      01A3D9B0 02B91AB0 03E597E0 00175C10 021CF210 01128B10 039BCE90 005629D0 027D3D30 0343A3A0 00E27270
      00E27270 0049A5A0 0136BBB0 01ADE660 037B1550 00C69FF0 00A5D000 00F73800 008CA400 00CAF600 00AF8D00
      00AF8D00 00F84B80 00423720
     
