-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Feb 11 01:08:06 2024 UTC
-- File 20240204_113032_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-04T11:30:35.000.000.000 to 2024-02-04T11:30:35.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240204_113032_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01A4D5C0 0176BF20 03CDE0B0 022B10E0 013E9890 03D0EA60 021C4FA0 01126870 019B5C40 0156F260 03FD8B50
      03FD8B50 00034EF0 0002E980 00039D40 000253E0 02037A10 02816380 01E0E920 03109DB0 0298D360 01D4BAD0
      01D4BAD0 033EE7B0 02A19460 01F15E50 0309F170 028D09C0 03CB8D20 001725D0 010E5B90 03897650 004DCD70
      004DCD70 006B2BC0 005EBE20 0271E130 034911A0 00ED9970 009B55C0 00D6FF20 015EC050 01F8D030 0104B820
      0104B820 0386E430 02459620 01675D30 01D4F3A0 033E8A70 02A1CF40 03F128E0 0009BC90 0306B160 0242F4E0
      0242F4E0 01638E90 03D249D0 003B6D30 0026DBA0 0235B670 032F6D40 02B8DBE0 01E4B610 0316ED10 024ECDC0
      024ECDC0 03B4D590 006EBF50 0259E0F0 03751080 02CF98C0 03A854A0 007C7EF0 00424180 00636140 0052D1E0
      0052D1E0 033DDC80 01519960 03F955D0 0005FF30 000700A0 020480F0 0306C080 0285A0C0 03C770A0 0024C8F0
      0024C8F0 0036AC80 0016FD60 030EC1E0 0089A110 02CD7190 01ABC950 037E2DF0 02C13B00 03A1A680 027175C0
      027175C0 0349CF20 00ED28B0
     
