-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Feb 10 23:44:50 2024 UTC
-- File 20240204_033442_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-04T03:34:45.000.000.000 to 2024-02-04T03:34:45.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240204_033442_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03B5F7E0 006F0C10 02588A10 0174CF10 03CEA890 0029FCD0 023D02B0 032383E0 02592100 0375B180 02CF6940
      02CF6940 03A8DDE0 007CB310 0242EA90 01639FD0 03D25030 023B7820 0126C430 02DAD310 02DBDD40 03B633E0
      03B633E0 006D2A10 025BBF10 01766090 03CD50D0 002BF8B0 003E04E0 02210690 013185D0 01D4A390 039F7920
      039F7920 0050C5B0 0078A760 0244F4D0 01668EB0 01D5C9E0 033F2D10 00A0BB90 02F0E650 01889570 00A66FE0
      00A66FE0 037AAC00 02C7FA00 03A40700 02760480 034D06C0 02EB85A0 019E4770 015164C0 01F9D6A0 03053DF0
      03053DF0 0143D180 00F11CA0 028992F0 03CD5B80 022BF640 033E0D60 00A10BD0 02F18E30 03894920 004DEDB0
      004DEDB0 006B1B60 032F4B60 025C7760 01724CD0 03CB6AB0 022EDFE0 0139B010 03A56810 0077DC10 024C3210
      024C3210 016A2B10 03DF3E90 021850E0 028A3C40 03CF2260 0028B350 023CEAF0 03229F80 02B3D040 03EA3860
      03EA3860 001F2450 0210B670 0318ED40 034A4DF0 0177B580 01CC6F40 012A58E0 03BF7490 0060CED0 0250A9B0
      0250A9B0 0378FD60 00C483D0
     
