-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Feb  6 19:26:08 2024 UTC
-- File 20240203_123748_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-03T12:37:51.000.000.000 to 2024-02-03T12:37:51.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240203_123748_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  037CA330 02C2F2A0 01A38BF0 01724E00 01CB6900 00976EC0 026E6CD0 00ACAD50 02FAFBF0 03878600 02444500
      02444500 03666780 02D55440 03BFFE60 00600150 025001F0 03780100 016200C0 02E98050 019D4070 0153E040
      0153E040 01FA1060 03071850 00849470 00C6DE40 00A5B160 02F769D0 018CDD30 02A559D0 00FBFA90 028607D0
      028607D0 01C50430 01278620 03B44530 026E67A0 01595470 01F5FE40 010F0160 038881D0 00266090 031AA860
      031AA860 0097FC50 02DC0270 03B20340 026B02E0 015E8390 03F1C250 00092370 000DB2C0 000B6BA0 01076F30
      01076F30 02C26C50 01A35A70 0172F740 01CB8CE0 032E4A90 00B96FD0 02E5D830 03973420 005CAE30 0072F920
      0072F920 0125C2D0 01DB91D0 03365930 02AD75A0 01FBCF70 010628C0 01853CA0 0347A2F0 02E47380 03964A40
      03964A40 025D6F60 02B9EC60 02F28D20 018BCBB0 014E2E60 03E93950 001DA5F0 00137700 001ACC80 0017AAC0
      0017AAC0 001C7FA0 02124070 018DB020 01A5B410 03776E10 00CCD910 02AAB590 01FFEF50 030018F0 02801480
      02801480 03C01EC0 022011A0
     
