-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Feb  6 17:15:32 2024 UTC
-- File 20240202_135704_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-02T13:57:07.000.000.000 to 2024-02-02T13:57:07.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240202_135704_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  020FF410 01080E10 038C0910 004A0D90 026F0B50 01588EF0 01F4C980 008756A0 01627EF0 00E9A0C0 009D70A0
      009D70A0 02D3C8F0 03BA2C80 02673AC0 0354A7A0 00FEF470 00818E40 00C14960 02A1EDD0 00F88D90 034265A0
      034265A0 00E35770 0092FCC0 00DB82A0 02B643F0 03ED6200 021BD300 03163A80 029D27C0 03D3B420 001D3710
      001D3710 0309D640 028D3D60 01CBA3D0 032E7230 02B94B20 01E5EEB0 011719E0 039C9510 0052DF90 027BB050
      027BB050 00A33430 02795710 0145FC90 03E702D0 001483B0 001EC260 0211A350 011972F0 0195CB80 015F2E40
      015F2E40 01F0B960 038472E0 022325C0 0332B720 00ABECB0 00FE1AE0 02811790 01C19C50 03215270 02B1FB40
      02B1FB40 03E906E0 001D8590 0309A3A0 0046B930 0065E5A0 02571770 037C9CC0 02C2D2A0 01A3BBF0 01726600
      01726600 01CB5500 012EFF80 01B98040 02B2A030 03F5F810 000F0410 02088610 010CC510 038AA790 004FF450
      004FF450 02680E70 035C0940 02F20DE0 018B0B10 03A74740 033A7270 02A74B40 03F4EEE0 000E9990 0209D550
      0209D550 010D3FF0 018BA000
     
