-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Feb  6 15:44:14 2024 UTC
-- File 20240202_080557_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-02T08:06:00.000.000.000 to 2024-02-02T08:06:00.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240202_080557_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  017011B0 02E40CB0 03CB0570 011743E0 03CE7100 0114A4C0 019EF6A0 03518DF0 02F94B00 0385EE80 024719C0
      024719C0 03649520 00D6DFB0 00BDB060 02E36850 00C96E30 0256EC90 017D9AD0 03C357B0 0222FC60 01338250
      01338250 03AA4370 027F62C0 0340D3A0 00E0BA70 0090E740 026C4A70 01AD37A0 037BAC70 02C67A40 03A54760
      03A54760 0077E4D0 024C16B0 036A1DE0 00DF1310 02B09A90 01E8D7D0 018E5E10 03A4B880 0276E4C0 034D96A0
      034D96A0 00EB5DF0 009EF300 00D18A80 00B94FC0 00E5E820 02971C30 03DC9220 00196D90 030AEDA0 008F9B70
      008F9B70 00C856C0 00AC7DA0 02FA4370 038762C0 0244D3A0 0166BA70 01D5E740 013F14E0 03D04F40 031C3470
      031C3470 02922E40 03DB3960 0036A5D0 022DF730 033B0CA0 00A68AF0 00F5CF80 008F2840 00C8BC60 03567120
      03567120 007EA4D0 0241F6B0 03610DE0 00D18B10 02B94E90 01E5E9D0 03171D30 029C93A0 01D2DA70 013BB740
      013BB740 02D33670 01DD56A0 0333FDF0 02AA0300 03FF0280 020083C0 0300C220 0080A330 00C0F2A0 02A08BF0
      02A08BF0 03F0CE00 01045480
     
