-- OK --
-----------------> BLESK ver.2021-02-27 run on Tue Feb  6 15:39:54 2024 UTC
-- File 20240202_053349_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-02-02T05:33:52.000.000.000 to 2024-02-02T05:33:52.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240202_053349_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0381D830 02413420 0161AE30 02E8BC90 02CE7160 02D4A4E0 02DF7B40 03B0C6E0 0068A590 025CF750 01728CF0
      01728CF0 01CBCA80 012E2FC0 01B93820 0365A430 02D77620 00DE6690 0358AAE0 00F4FF90 028E8050 01C9C070
      01C9C070 012D2040 01BBB060 03666850 00D55C70 00BFF240 00E00B60 03480760 02760260 014D0350 03EB82F0
      03EB82F0 021E4380 03116240 0299D360 01D53AD0 033FA7B0 02A07460 01F04E50 018434B0 02A31770 03F29CC0
      03F29CC0 020BD2A0 010E3BF0 01892600 014DB500 01EB6F80 011ED840 0191B460 03596E50 007AECB0 0223CD70
      0223CD70 03322BC0 02AB3E20 01FEA130 0101F1A0 03810970 02418DC0 03614B20 00D1EEB0 00B919E0 0372CA80
      0372CA80 0165D7E0 03D73C10 003CA210 0222F310 01338A90 03AA4FD0 007F6830 0040DC20 0260B230 0350EB20
      0350EB20 007C4F50 01213470 01B1AE40 01697960 03DDC5D0 00332730 002AB4A0 023FEEF0 03201980 02B01540
      02B01540 03E81FE0 020E0800 01848600 0146C500 01E5A780 01177440 019CCE60 0352A950 00FBFDF0 00860300
      00860300 00C50280 00A783C0
     
