-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Feb  5 12:42:33 2024 UTC
-- File 20240122_111454_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-22T11:14:57.000.000.000 to 2024-01-22T11:14:57.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240122_111454_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  011DBC50 03936270 025AD340 0377BAE0 00CC6790 02AA5450 00FFBF30 008060A0 02C050F0 03A07880 027044C0
      027044C0 034866A0 00EC55F0 009A7F00 00D74080 00BCE0C0 02714850 00A4F630 00F68D20 028DCBB0 03CB2E60
      03CB2E60 002EB950 0239E5F0 03251700 02B79C80 03EC52C0 021A7BA0 008BA330 02673950 0154A5F0 01FEF700
      01FEF700 01018C80 01814AC0 0141EFA0 03E11870 02119440 03195E60 0095F150 016F84F0 00EC2340 009A32E0
      009A32E0 02D72B90 01BCBE50 0362E170 02D391C0 03BA5920 006775B0 0054CF60 027EA8D0 00A0FE50 017840B0
      017840B0 01C460E0 03265090 00B578D0 02EFC4B0 039826E0 00543590 027E2F50 014138F0 01E1A480 0088BB60
      0088BB60 03667360 00D54AD0 02BFEFB0 03E01860 00101450 02181E70 03141140 029E19E0 01D11510 03399F90
      03399F90 0252A820 00BDFE10 02E30110 01928190 035BC150 00F621F0 008D3100 00CBA980 00AE7D40 00F943E0
      00F943E0 0285E210 02E38980 01C926A0 032DB5F0 02BB6F00 03E6D880 0215B4C0 031F6EA0 0090D9F0 00D8B500
      00D8B500 00B4EF80 00EE9840
     
