-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Feb  5 11:13:09 2024 UTC
-- File 20240122_091320_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-22T09:13:23.000.000.000 to 2024-01-22T09:13:23.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240122_091320_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  013A7F00 01A74080 0174E0C0 01CE90A0 0329D8F0 02BD3480 03E3AEC0 021279A0 011B4570 0196E7C0 015D9420
      015D9420 03F35E30 020AF120 010F89B0 01884D60 034C6BD0 00EA5E30 024FB890 016864D0 03DC56B0 02327DE0
      02327DE0 012B4310 03BEE290 006193D0 02515A30 0379F720 00C50CB0 0253C570 01BD13E0 03639A10 00D25710
      00D25710 02BB7C90 01E6C2D0 0315A3B0 029F7260 01D0CB50 0338AEF0 02A4F980 01FB42A0 018371F0 0142C900
      0142C900 01E3AD80 01127B40 019B46E0 0356E590 00FD9750 02835CF0 03C2F280 02238BC0 03992710 022ADA40
      022ADA40 033FB760 00A06CD0 02F05AB0 038877E0 004C4C10 026A6A10 015F5F10 03F0F090 000888D0 01066650
      01066650 01C2AAB0 0123FFE0 03B20010 006B0010 025E8010 0171C010 03C92010 002DB010 023B6810 0126DC10
      0126DC10 03DAD900 011BDAC0 019637A0 035D2C70 02F3BA40 038A6760 004F54D0 0268FEB0 035C81E0 00F2C110
      00F2C110 028BA190 02E738A0 00CA5270 00AF7B40 00F8C6E0 0284A590 01C6F750 03258CF0 02B74A80 03ECEFC0
      03ECEFC0 021A9820 0117D430
     
