-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Feb  5 11:08:37 2024 UTC
-- File 20240122_090921_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-22T09:09:24.000.000.000 to 2024-01-22T09:09:24.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240122_090921_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  019F4E70 0150E940 01F89DE0 0304D310 0086BA90 02C5E7D0 01A71430 01749E20 03CED130 0229B9A0 013D6570
      013D6570 00D1EBE0 035C8F00 02F2C880 038BACC0 024E7AA0 016947F0 01DDE400 01331600 01AA9D00 017FD380
      017FD380 01C03A40 029013B0 03EC0D30 021A0BA0 01170E70 019C8940 0152CDE0 03FBAB10 00067E90 020541D0
      020541D0 0107E130 018411A0 01A30CB0 02B94570 03E5E7C0 02171420 011C9E30 0192D120 035BB9B0 02F66560
      02F66560 018D57D0 034BFC30 02EE0220 00CC8190 035560A0 00FFD0F0 00803880 00C024C0 00A036A0 02F02DF0
      02F02DF0 03883B00 024C2680 036A35C0 02DF2F20 00D85C50 015A3930 01F725A0 030CB770 028AECC0 03CF9AA0
      03CF9AA0 002857F0 003C7C00 00224200 00336300 002AD280 001FDDE0 03081980 028C1540 03CA1FE0 002F1010
      002F1010 02389810 0124D410 03B6BE10 006DE110 025B1190 01769950 01E6EAF0 008ACFC0 00CFA820 02A87C30
      02A87C30 03FC4220 00026330 000352A0 0202FBF0 03038600 02824500 03C36780 01116A20 01CCEF90 032A9850
      032A9850 00BFD470 00E03E40
     
