-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Feb  5 09:15:02 2024 UTC
-- File 20240122_045757_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-22T04:58:00.000.000.000 to 2024-01-22T04:58:00.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240122_045757_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01C1F790 03908620 002C6290 023A53D0 01277A30 01B4C720 036EA4B0 02D9F6E0 01B50D90 036F8B50 00D84EF0
      00D84EF0 00B46980 00772EA0 01265CF0 01B57280 016FCBC0 01D82E20 03343930 02AE25A0 01F93770 0105ACC0
      0105ACC0 01877AA0 0344C7F0 01735200 00E57D80 0097C340 00DC22E0 02B23390 01EB2A50 031EBF70 0291E0C0
      0291E0C0 03D910A0 003598F0 002F5480 001C7F60 03092060 008DB050 02CB6870 03AEDC40 0279B260 01456B50
      01456B50 03E7DEF0 02143180 031E2940 02913DE0 02ECD180 01CD5CA0 032BF2F0 02BE0B80 03E10E40 02118960
      02118960 01194DD0 0395EB30 025F1EA0 017091F0 01C8D900 00965AC0 026EBBD0 0159E630 01F51520 030F9FB0
      030F9FB0 02885060 01CC7850 032A4470 02BF6640 03E0D560 0010BFD0 010C7010 03C52400 0227B600 03346D00
      03346D00 02AE5B80 03F97640 0205CD60 01072BD0 0384BE30 0246E120 016591B0 02EBACB0 03CF3D70 0228A3C0
      0228A3C0 033CF220 00A28B30 00F3CEA0 028A29F0 03CF3D00 0228A380 033CF240 02A28B60 02F9E760 02C28A60
      02C28A60 01A3CF50 037228F0
     
