-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Feb  5 08:31:48 2024 UTC
-- File 20240122_034802_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-22T03:48:05.000.000.000 to 2024-01-22T03:48:05.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240122_034802_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02C567F0 03A7D400 013A1F00 00D38840 00BA4C60 02E76A50 0194DF70 015EB0C0 01F1E8A0 03091CF0 028D9280
      028D9280 03CB5BC0 022EF620 009CC690 036952E0 00DDFB90 02B30650 01EA8570 011FC7C0 01902420 03583630
      03583630 02F42D20 018E3BB0 01492660 03F6DAA0 0006DBF0 0005B600 00076D00 0004DB80 0006B640 0005ED60
      0005ED60 02071BD0 01049630 0186DD20 0345B3B0 0373B530 036537D0 00D7AC30 00BC7A20 02E24730 039364A0
      039364A0 005AD6F0 0077BD80 004C6340 006A52E0 025F7B90 02B86320 00F22950 028B3DF0 03CEA300 0229F280
      0229F280 033D0BC0 02A38E20 01F24930 010B6DA0 038EDB70 0249B6C0 03B6B6D0 0036F6D0 022D8DB0 033B4B60
      033B4B60 00A6EED0 02F599B0 038F5560 0048FFD0 026C8030 035AC020 00F7A030 02463810 02B29200 03EBDB00
      03EBDB00 021E3680 03112DC0 0299BB20 01D566B0 013FD5E0 03A03F10 00702090 024830D0 00B61450 01768F30
      01768F30 01CDC8A0 032B2CF0 02BEBA80 03E1E7C0 02111420 01199E30 01955120 035FF9B0 02F00560 02C403E0
      02C403E0 02D30100 03BA8180
     
