-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Feb  5 08:16:39 2024 UTC
-- File 20240122_033121_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-22T03:31:24.000.000.000 to 2024-01-22T03:31:24.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240122_033121_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  005B3AD0 0276A7B0 034DF460 00EB0E50 029E8970 03D1CDC0 02392B20 0125BEB0 01B761E0 03B66880 0136AE60
      0136AE60 03D6FCA0 001EC170 0011A1C0 00197120 0215C9B0 031F2D60 0090BBD0 02D8E630 03B49520 006EDFB0
      006EDFB0 0059B060 033AB420 0053F710 027A0C90 01470AD0 03E48FB0 0216C860 011DAC50 03937A70 025AC740
      025AC740 0377A4E0 00CC7690 035526E0 027FDAC0 034037A0 00E02C70 00903A40 00D82760 02B434D0 01EE2EB0
      01EE2EB0 011939E0 0395A510 005F7790 03386620 00522A90 027B3FD0 0146A030 01E5F020 03170830 029C8C20
      029C8C20 01D2CA30 013BAF20 03A678B0 027544E0 02A7F340 03FA0570 020707C0 03048420 0086C630 00C5A520
      00C5A520 02A777B0 03F4CC60 000EAA50 0209FF70 030D00C0 0345C050 00739030 004A5820 026F7430 0358CE20
      0358CE20 00F4A930 008EFDA0 02C98370 03AD42C0 027BE3A0 01461270 00F28DA0 0145E5B0 01E71760 03149CD0
      03149CD0 009ED2B0 00D1BBE0 02B96610 01E5D510 03173F90 009CA050 02D2F070 01DDC420 01999310 03555A90
      03555A90 00FFF7D0 02800C30
     
