-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Feb  5 07:13:33 2024 UTC
-- File 20240122_014502_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-22T01:45:05.000.000.000 to 2024-01-22T01:45:05.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240122_014502_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  029BAF00 03D67880 023D44C0 0323E6A0 00590AF0 003AC7C0 0213D210 011A3B10 03972690 005CB5D0 0272EF30
      0272EF30 034B98A0 00EE54F0 00997E80 00D5C1C0 00BF2120 017058D0 01E43A50 03162770 029D34C0 03D3AEA0
      03D3AEA0 003A79F0 00274500 0034E780 002E9440 0039DE60 02253150 009BD4F0 006B1F40 005E90E0 0271D890
      0271D890 014934D0 03EDAEB0 021B79E0 0116C510 039DA790 00537450 027ACE70 01A3D4A0 01B91F70 016590C0
      016590C0 01D758A0 033CF4F0 02A28E80 03F3C9C0 020A2D20 010F3BB0 0188A660 034CF550 007547F0 0027F200
      0027F200 00340B00 002E0E80 003909C0 00258D20 02374BB0 032CEE60 00BA9950 02E7D5F0 03943F00 012F1040
      012F1040 02DC4C30 03B26A20 006B5F30 005EF0A0 027188F0 03494C80 02EDEAC0 039B1FA0 00569070 007DD840
      007DD840 02219A30 0398AB90 0054FE50 027E8170 0341C1C0 02E12120 0191B1B0 01596960 03F5DDD0 000F3330
      000F3330 0008AAA0 01067FF0 00C2A000 00A3F000 00F20800 008B0C00 00CE8A00 00A9CF00 00FD2880 0083BCC0
      0083BCC0 00C262A0 02A353F0
     
