-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Feb  5 06:28:36 2024 UTC
-- File 20240122_001359_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-22T00:14:02.000.000.000 to 2024-01-22T00:14:02.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240122_001359_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01C23BB0 02919330 03ECAD50 000D7DF0 0005E180 00071140 000499E0 0206D510 0105BF90 03876050 0044D070
      0044D070 0066B840 0055E460 027F1650 00A04EB0 027834F0 03442E80 02E639C0 03952520 005FB7B0 00706C60
      00706C60 02485A50 016C7770 01DA4CC0 01376AA0 01D66FF0 009EAC00 00D1FA00 00B90700 00E58480 009746C0
      009746C0 00DCE5A0 02B29770 03EBDCC0 021E32A0 01112BF0 00CCDF00 00555840 007FF460 02400E50 01600970
      01600970 01D00DC0 01380B20 03A40EB0 027609E0 014D0D10 03EB8B90 020F2720 00845A50 02C67770 03A54CC0
      03A54CC0 0277EAA0 014C1FF0 01EA1000 011F1800 01909400 0158DE00 01F4B100 008774C0 02626750 015354F0
      015354F0 01FAFE80 010781C0 01844120 034661B0 02E55160 0197F9D0 035C0530 02F207A0 00C58230 0253A190
      0253A190 017A7150 03C749F0 0224ED00 03369B80 02ADD640 03FB3D60 0006A3D0 0205F230 03070B20 00424750
      00424750 0131B270 01A96B40 017DDEE0 03C33190 0022A950 0233FDF0 032A0300 02BF0280 03E083C0 0210C220
      0210C220 008C5190 03653CA0
     
