-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Feb  5 04:12:59 2024 UTC
-- File 20240121_173140_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-21T17:31:43.000.000.000 to 2024-01-21T17:31:43.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240121_173140_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00EAF600 009F8D00 00D04B80 00B86E40 00E45960 029675D0 01DD4F30 0133E8A0 03AA1CF0 027F1280 03409BC0
      03409BC0 02E0D620 0190BD30 0158E3A0 01FA4930 01076DA0 0384DB70 0246B6C0 0365EDA0 00D71B70 00BC96C0
      00BC96C0 00E2DDA0 0293B370 03DA6AC0 031BAFD0 004B3C10 026EA210 0159F310 03F50A90 000F8FD0 02084830
      02084830 030C6C20 008A5A30 00CF7720 02A8CCB0 03FE5570 0100BFE0 0380E010 00409010 0260D810 0150B410
      0150B410 03F8EE10 00049910 0206D590 0105BF50 038760F0 01226840 02D9AE30 03B57920 006FC5B0 00582760
      00582760 027434D0 014E2EB0 01E939E0 031DA510 00937790 02DACC50 00DBD530 025B1FD0 01769030 01CDD820
      01CDD820 032B3430 02BEAE20 01E1F930 011105A0 03998770 025544C0 037FE6A0 00600AF0 002807C0 003C0420
      003C0420 02220630 03330520 00AA87B0 00FFC460 02802650 01C03570 01202FC0 01B03820 01B41210 03B70D80
      03B70D80 026C8B40 035ACEE0 00F7A990 028C7D50 01CA43F0 012F6200 01B8D300 0164BA80 01D6E7C0 029ECA10
      029ECA10 02E8D780 039CBC40
     
