-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Feb  5 03:03:04 2024 UTC
-- File 20240121_151932_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-21T15:19:35.000.000.000 to 2024-01-21T15:19:35.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240121_151932_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02F42400 038E3600 02492D00 01B6DDC0 02B6D990 01EDB550 031B6FF0 0296D800 03DDB400 02336E00 032AD900
      032AD900 02BFB580 03E06F40 021058E0 028C3A40 03E513B0 02179A60 011C5750 03927CF0 025B4280 0376E3C0
      0376E3C0 02CD9220 01AB5B30 017EF6A0 03C18DF0 0110A580 00CC7BA0 02AA4670 03FF6540 0200D7E0 0100BC10
      0100BC10 0380E210 00409310 0260DA90 0150B7D0 03F8EC30 03024D10 0241B5C0 03616F20 00D1D8B0 00B934E0
      00B934E0 02E5AE90 019779D0 035CC530 02F2A7A0 018BF470 014E0E40 02F484B0 03C76370 0224D2C0 0336BBA0
      0336BBA0 00ADE670 00FB1540 00869FE0 02C5D010 01A73810 0374A410 00CEF610 0354C680 017F52E0 03C0FB90
      03C0FB90 00208650 0230C570 0328A7C0 02BCF420 01E28E30 0113C920 039A2DB0 02573B60 02BE5360 02F0BD60
      02F0BD60 0188E3D0 034C9230 02EADB20 019FB6B0 01506DE0 03F85B10 00047690 02064DD0 01056B30 02C3EF50
      02C3EF50 00D10C70 00B98A40 00E54F60 0297E8D0 01DC1CB0 013212E0 03AB1B90 007E9650 0241DD70 036133C0
      036133C0 0368D510 026E5FC0
     
