-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Feb  5 01:11:50 2024 UTC
-- File 20240121_114254_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-21T11:42:57.000.000.000 to 2024-01-21T11:42:57.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240121_114254_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01FC7F40 010240E0 03836090 0042D0D0 0263B8B0 035264E0 00FB5690 03437EE0 00E2C190 0293A150 01DA71F0
      01DA71F0 01374900 01ACED80 017A9B40 01C7D6E0 03243D90 00B62350 01769970 00E6EAE0 02959F90 01DF5050
      01DF5050 0330F870 02A88440 03FCC660 0002A550 0203F7F0 03020C00 02830A00 01E14780 0088F220 02CC8B30
      02CC8B30 03AACEA0 007FA9F0 00407D00 00604380 00506240 00785360 02447AD0 016647B0 02EAB230 03CFF590
      03CFF590 00280F50 023C08F0 03220C80 02B30AC0 03EA8FA0 001FC870 00102C40 00183A60 02142750 008F1A70
      008F1A70 00644BA0 02566E70 037D5940 02C3F5E0 01A20F10 03730890 00CA8CD0 02AFCAB0 03F82FE0 00043810
      00043810 03031200 01414D80 01E1EB40 01111EE0 03999190 00555950 027FF5F0 03400F00 02E00880 03900CC0
      03900CC0 02580AA0 00BA07F0 00738200 004A4300 006F6280 0058D3C0 0074BA20 024EE730 036994A0 00DD5EF0
      00DD5EF0 00B3F180 00EA0940 024F86F0 01B422C0 016E33A0 03D92A70 0235BF40 032F60E0 00B8D090 02E4B8D0
      02E4B8D0 0196E4B0 015D96E0
     
