-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Feb  5 00:47:22 2024 UTC
-- File 20240121_101739_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-21T10:17:42.000.000.000 to 2024-01-21T10:17:42.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240121_101739_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  018BBC10 034E6210 00E95310 029DFA90 01D307D0 019D4210 03A9F180 013E84A0 01D0E370 009C4960 02D26DD0
      02D26DD0 01BB5B30 0166F6A0 03D58DF0 023F4B00 0320EE80 02B099C0 03E8D520 001CBFB0 02097030 0386E410
      0386E410 00459610 02675D10 0154F390 03FE8A50 0001CF70 000128C0 0001BCA0 020162F0 0301D380 01409D20
      01409D20 01F069D0 03085D30 028C73A0 01CA4A70 012F6F40 01B8D8E0 0364B490 00D6EED0 02BD99B0 03E35560
      03E35560 02097FE0 0286E000 03C59000 02275800 0334F400 02AE8E00 03F9C900 02052D80 0307BB40 028466E0
      028466E0 01C65590 0392BFA0 002DF030 003B0820 02268C30 0335CA20 00AF2F30 00F8B8A0 0284E4F0 03C69680
      03C69680 0225DDC0 03373320 00565550 013EBFF0 01A1E000 01711000 01C99800 012D5400 01BBFE00 01660100
      01660100 01D50180 013F8140 01A041E0 03B83080 01321460 03AB1E50 007E9170 0041D9C0 00613520 0251AFB0
      0251AFB0 03797860 00C5C450 02A72670 03F4B540 030777F0 01426600 01E35500 0112FF80 019B8040 01564060
      01564060 03FD6050 0003D070
     
