-- OK --
-----------------> BLESK ver.2021-02-27 run on Mon Feb  5 00:29:41 2024 UTC
-- File 20240121_092801_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-21T09:28:04.000.000.000 to 2024-01-21T09:28:04.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240121_092801_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  019A2E60 03573950 00FCA5F0 0082F700 00C38C80 00A24AC0 00F36FA0 028AD870 03CFB440 02286E60 013C5950
      013C5950 03A275F0 0139A780 00D2BA20 02BBE730 03E614A0 00151EF0 001F9180 00105940 001875E0 02144F10
      02144F10 011E6890 03915CD0 002CF950 011D42F0 0193E380 015A1240 01F71B60 030C96D0 008ADDB0 00CFB360
      00CFB360 02A86AD0 01FC5FB0 01027060 03C1A420 0010BB10 0218E690 011495D0 039EDF30 0251B0A0 017968F0
      017968F0 01C5DC80 012732C0 01B4ABA0 036EFE70 016CC0A0 01ED5070 011BF840 01960460 035D0650 00F38570
      00F38570 008A47C0 00CF6420 02A8D630 03FCBD20 0002E3B0 0201C930 038096D0 0040DDB0 0060B360 0250EAD0
      0250EAD0 01789FB0 01C4D060 0326B850 00B5E470 00EF1640 00989D60 036A69E0 026FAE80 035879C0 02F44520
      02F44520 018E67B0 01495460 03EDFE50 001B0170 001681C0 001DC120 021321B0 038D58B0 0325FA70 02B70740
      02B70740 03EC84E0 001AC690 0217A5D0 011C7730 01924CA0 035B6AF0 02F6DF80 038DB040 0325B430 035BB710
      035BB710 00F66C90 028D5AD0
     
