-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Feb  4 23:21:46 2024 UTC
-- File 20240121_071340_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-21T07:13:43.000.000.000 to 2024-01-21T07:13:43.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240121_071340_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02ED9A20 019B5730 0156FCA0 03FD82F0 02034380 0302E240 0341C9B0 037096B0 03646EF0 02D65980 03BD7540
      03BD7540 0263CFE0 01522810 03FB3C10 0006A210 0205F310 01070A90 03848FD0 00236410 03196B00 0295DE80
      0295DE80 03DF31C0 0230A920 0128FDB0 01BC8360 0362C2D0 00D3A3B0 00BA7260 02E74B50 00CA7770 0057A660
      0057A660 027C7550 01424FF0 01E36800 0112DC00 019BB200 01566B00 01FD5E80 0103F1C0 01820920 01A186D0
      01A186D0 01B8A2D0 0364F3B0 02D68A60 01BDCF50 036328F0 02D2BC80 03BBE2C0 026613A0 01551A70 01FF9740
      01FF9740 02802E70 01E01CA0 031012F0 02981B80 03D41640 023E1D60 012113D0 03B19A30 02695720 015DFCB0
      015DFCB0 01F302E0 038541C0 0323F090 00B208D0 02EB0CB0 039E8AE0 0051CF90 02792850 0145BC70 01E76240
      01E76240 0114D360 039EBAD0 0028F3D0 011E4510 03916790 0059D450 02753E70 034FA140 02E871E0 019C4910
      019C4910 03526D90 00FB5B50 0286F6F0 01E2C6C0 0289D2D0 01CD3BB0 012BA660 03BE7550 00614FF0 0051E800
      0051E800 00791C00 00459200
     
