-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Feb  4 23:20:15 2024 UTC
-- File 20240121_071144_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-21T07:11:47.000.000.000 to 2024-01-21T07:11:47.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240121_071144_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03A69CF0 0275D280 01A79DE0 03BA2980 01339EA0 01D528F0 009FDE40 00D03160 02B829D0 01E43D30 011623A0
      011623A0 039D3270 0253AB40 037A7EE0 00C74190 02A4E150 00FB48F0 00437640 0062CD60 0253ABD0 017A7E30
      017A7E30 01C74120 0324E1B0 02B69160 01EDD9D0 031B3530 0296AFA0 00EEFC30 024CC110 016AA190 03DFF150
      03DFF150 003009F0 00280D00 003C0B80 00220E40 00330960 022A8DD0 013FCB30 02D01750 00DC0E70 00B20940
      00B20940 00EB0DE0 029E8B10 01D1CE90 033929D0 00A5BD30 00F763A0 028CD270 03CABB40 0317F370 014E0560
      014E0560 03E907D0 001D8430 00134620 021AE530 031797A0 009C5C70 00D27240 00BB4B60 02E6EED0 00CACCD0
      00CACCD0 0157D550 03FC3FF0 02022000 03033000 0282A800 03C3FC00 02220200 03330300 02AA8280 03FFC3C0
      03FFC3C0 03001110 02400CC0 03600AA0 00D00FF0 00B80800 00E40C00 00960A00 00DD0F00 00B38880 00EA4CC0
      00EA4CC0 009F6AA0 01686FF0 00EE2C00 00993A00 00D5A700 00BF7480 00E0CEC0 0090A9A0 02D8FD70 03B483C0
      03B483C0 026EC220 0159A330
     
