-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Feb  4 23:15:32 2024 UTC
-- File 20240121_070630_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-21T07:06:33.000.000.000 to 2024-01-21T07:06:33.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240121_070630_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  039A46A0 005765F0 007CD700 0042BC80 0063E2C0 022909D0 009EC690 0368D2E0 026E5DC0 03597320 00F5CAB0
      00F5CAB0 008F2FE0 02C8B810 01ACE410 037A9610 00C7DD10 02A43390 01F62A50 01869FB0 02A2E830 03F39C20
      03F39C20 000A5230 000F7B20 0208C6B0 030CA5E0 008AF710 02CF8C90 01A84AD0 037C6FB0 03612C30 0368DD10
      0368DD10 00DCB390 02B2EA50 01EB9F70 011E50C0 019178A0 0359C4F0 02F52680 038FB5C0 02486F20 00B62C50
      00B62C50 01769D30 01CDD3A0 032B3A70 02BEA740 03E1F4E0 00110E90 021989D0 01154D30 019FEBA0 03501E70
      03501E70 017C08A0 01E10670 01118540 019947E0 0355E410 00FF1610 02809D10 01C0D390 0320BA50 00B0E770
      00B0E770 00E894C0 024E6F50 00B4AC70 00EEFA40 00998760 02D544D0 01BFE6B0 016015E0 03D01F10 00381090
      00381090 022418D0 013614B0 02D68F70 01DEE460 03319650 00A95D70 00FDF3C0 00830A20 02C28F30 03A3C8A0
      03A3C8A0 00722CF0 004B3A80 006EA7C0 022CFA10 029D4380 03D3E240 023A1360 01271AD0 03B497B0 026EDC60
      026EDC60 0159B250 03F56B70
     
