-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Feb  4 22:59:20 2024 UTC
-- File 20240121_064344_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-21T06:43:47.000.000.000 to 2024-01-21T06:43:47.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240121_064344_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00AB3BB0 00FEA660 0281F550 01C10FF0 0090C400 00D8A600 00B4F500 00EE8F80 0099C840 00D52C60 02BFBA50
      02BFBA50 01E06770 011054C0 01987EA0 01AA20F0 00BF9840 00E05460 02907E50 01D84170 013461C0 01AE5120
      01AE5120 037979B0 02C5C560 01A727D0 0374B430 03677710 026A6640 035F5560 00F0FFD0 02888030 03CCC020
      03CCC020 002AA030 003FF020 02200830 03300C20 00A80A30 027E0790 02A08220 01F0C330 0108A2A0 038CF3F0
      038CF3F0 024A8A00 036FCF00 02D82880 03B43CC0 026E22A0 015933F0 00FAD500 0043DFC0 00623020 02532830
      02532830 037ABC20 00C7E230 00A41320 02F61AB0 038D17E0 004B9C10 026E5210 02ACBD80 01FD71A0 0303C970
      0303C970 02822DC0 03C33B20 0022A6B0 0033F5E0 022A0F10 013F0890 03A08CD0 0070CAB0 022457F0 019B3E00
      019B3E00 0156A100 01FDF180 01030940 01828DE0 0343CB10 00E22E90 029339D0 01DAA530 0137F7A0 01D60630
      01D60630 029E8290 01D1C3D0 03392230 02A5B320 01F76AB0 010CDFE0 038AB010 004FE810 02681C10 015C1210
      015C1210 03F90D80 0102C5A0
     
