-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Feb  4 21:53:05 2024 UTC
-- File 20240121_051729_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-21T05:17:32.000.000.000 to 2024-01-21T05:17:32.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240121_051729_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02468A90 0165CFD0 03D72830 031E5E10 0248B880 01B67260 03B6A5A0 006DF770 005B0CC0 00768AA0 024DCFF0
      024DCFF0 036B2800 02DEBC00 03B1E200 02691300 035D9A80 0179ABE0 03E2BF00 0213E080 031A10C0 029718A0
      029718A0 01DC94F0 0132DE80 01ABB1C0 017E6920 03C15DB0 0221F360 02988560 02EA63E0 019F5210 0350FB10
      0350FB10 00F88690 0284C5D0 01C6A730 0125F4A0 03B70EF0 026C8980 035ACD40 037BD5F0 01631F80 01D29040
      01D29040 013BD860 03A63450 00752E70 004FB940 006865E0 025C5710 01727C90 03CB42D0 001771D0 010E6490
      010E6490 038956D0 004DFDB0 006B0360 025E82D0 0171C3B0 01C92260 032DB350 00BB6AF0 00E6DF80 004AD820
      004AD820 0137DA10 03AC3710 007A2C90 02473AD0 0164A7B0 01D6F460 033D8E50 00A34970 00F2EDC0 008B9B20
      008B9B20 01672B50 01EA5F70 011F70C0 0190C8A0 0358ACF0 02F4FA80 038E87C0 0249C420 016D2630 01DBB520
      01DBB520 03366FB0 0356AC30 037EFD10 00C18390 02A14250 01F1E370 010912C0 018D9BA0 034B5670 02EEFD40
      02EEFD40 039983E0 00554210
     
