-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Feb  4 21:40:12 2024 UTC
-- File 20240121_050522_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-21T05:05:25.000.000.000 to 2024-01-21T05:05:25.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240121_050522_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  011A8870 0197CC40 015C2A60 03F23F50 000B20F0 000EB080 0009E8C0 000D1CA0 020B92F0 030E5B80 0144BB20
      0144BB20 03E6E6B0 021595E0 011F5F10 0390F090 005888D0 0274CCB0 034EAAE0 00E9FF90 029D0050 00E9C030
      00E9C030 024E9010 0169D810 03DD3410 0033AE10 022A7910 013F4590 03A0E750 007094F0 0048DE80 006CB1C0
      006CB1C0 022D7490 029DE760 01D314D0 033A9EB0 02A7D1E0 01F43910 030E2590 00893750 02CDACF0 03AB7A80
      03AB7A80 027EC7C0 03A0D210 02385D80 03247340 02B64AE0 01ED6F90 031BD850 00963470 00DD2E40 00B3B960
      00B3B960 02EA65D0 019F5730 02A87E50 00FE20B0 008130E0 02C1A890 01A17CD0 0371C2B0 02C923E0 01ADB210
      01ADB210 037B6B10 00C6DE90 02A5B1D0 00FBB490 03433760 00E2ACD0 0293FAB0 03DA07E0 00370410 022C8610
      022C8610 013AC510 03A7A790 00747450 024E4E70 01B4B4A0 01B77770 016CCCC0 01DAAAA0 0337FFF0 02AC0000
      02AC0000 03FA0000 02070000 03048000 0286C000 03C5A000 0113B800 00CD3200 00ABAB00 00FE7E80 008141C0
      008141C0 00C1E120 02A111B0
     
