-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Feb  4 21:21:54 2024 UTC
-- File 20240121_042809_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-21T04:28:12.000.000.000 to 2024-01-21T04:28:12.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240121_042809_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0143DC00 01E23200 01132B00 019ABE80 0157E1C0 01FC1120 01810CD0 01A0C550 01B853F0 01647A00 01D64700
      01D64700 013D6480 01A3D6C0 01723DA0 03CB2370 022EB2C0 0339EBA0 00A51E70 007BC8A0 01231670 01B29D40
      01B29D40 016BD3E0 03DE3A10 00312710 0229B490 013D6ED0 03A3D9B0 02723560 014B2FD0 01F75C10 03867900
      03867900 02454580 0367E740 02D414E0 01BE1E90 036111D0 00D19930 00B955A0 02E5FF70 039700C0 032E4050
      032E4050 005CB030 0072E820 024B9C30 036E5220 00D97B30 00B5C6A0 02EF25F0 0398B700 0254EC80 037E9AC0
      037E9AC0 0360EBD0 00684F10 025C6890 01725CD0 03CB72B0 022ECBE0 0139AE10 03A57910 0077C590 024C2750
      024C2750 016A34F0 00EF9740 024C2E70 036A3940 02DF25E0 01B0B710 0368EC90 00DC9AD0 02B2D7B0 03EBBC60
      03EBBC60 001E6250 02115370 018CFD60 03A541E0 0077E110 024C1190 016A1950 03DF15F0 02309F00 0328D080
      0328D080 02BCB8C0 03E2E4A0 001396F0 000D2EC0 0205DCD0 010732B0 0184ABE0 0346FE10 00E58110 02974190
      02974190 01DCE150 033291F0
     
