-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Feb  4 20:59:29 2024 UTC
-- File 20240121_034942_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-21T03:49:45.000.000.000 to 2024-01-21T03:49:45.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240121_034942_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  016278F0 01D34480 013AE6C0 01A795A0 03745F70 02CE70C0 03A948A0 007DECF0 00218D40 00314BE0 0229EE10
      0229EE10 013D1910 03A39590 00725F50 024B70F0 036EC880 02D9ACC0 03B57AA0 0037E3F0 00160900 001D0D80
      001D0D80 00138B40 001A4EE0 02176990 011CDD50 0392B3F0 025BEA00 03761F00 02CD1080 01D5CC60 039F9520
      039F9520 00505FB0 00787060 02444850 01666C70 01D55A40 013FF760 03A00CD0 00700AB0 00480FE0 03360400
      03360400 01568300 01FDC280 010323C0 0182B220 0343EB30 02E21EA0 019311F0 015A9900 01F7D580 010C3F40
      010C3F40 02C51070 01D3CC20 033A2A30 02A73F20 01F4A0B0 010EF0E0 03898890 004D4CD0 026BEAB0 035E1FE0
      035E1FE0 00F11010 0344CC00 01735500 01CAFF80 012F8040 01B84060 03646050 00D65070 00BD7840 00E3C460
      00E3C460 02922650 01DB3570 009B57E0 036B7E00 02DEC100 03B1A180 02697140 035DC9E0 00F32D10 028ABB90
      028ABB90 01CFE650 03281570 02BC1FC0 03F10810 0204C600 0306A500 0285F780 03C70C40 02248A60 0136CF50
      0136CF50 03ADA8F0 027B7C80
     
