-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Feb  4 20:57:51 2024 UTC
-- File 20240121_034802_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-21T03:48:05.000.000.000 to 2024-01-21T03:48:05.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240121_034802_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0012FDB0 001B8360 021642D0 011D63B0 0193D260 035A3B50 00F726F0 008CB580 006577A0 012BE630 01BE1520
      01BE1520 03611FB0 02D19060 01B95850 0365F470 02D70E40 03BC8960 0062CDD0 0253AB30 03BD3F50 0031D070
      0031D070 00293840 003DA460 02237650 0132CD70 01ABABC0 017E7E20 03C14130 0221E1A0 01311170 00D4CCE0
      00D4CCE0 035F5540 02F0FFE0 01888010 034CC010 00EAA010 029FF010 01D00810 03380C10 00A40A10 02F60F10
      02F60F10 02C68440 03D2E330 023B92A0 01265BF0 01B57600 016FCD00 01D82B80 01343E40 01AE2160 037931D0
      037931D0 00C5A930 0253BED0 00BD30D0 02E3A8B0 03927CE0 005B4290 0276E3D0 014D9230 01EB5B20 031EF6B0
      031EF6B0 02918DE0 01D94B10 039AF740 032BC670 02BE2540 03E137E0 0011AC10 02197A10 0115C710 039F2490
      039F2490 0050B6D0 0278EDB0 03449B60 02736B60 02A56F60 01F7D8D0 030C34B0 028A2EE0 01CF3990 0328A550
      0328A550 00BCF7F0 00E28C00 0093CA00 00DA2F00 005B9C40 023B2930 0326BDA0 00B5E370 00EF12C0 00989BA0
      00989BA0 02D4D670 03BEBD40
     
