-- OK --
-----------------> BLESK ver.2021-02-27 run on Sun Feb  4 19:39:40 2024 UTC
-- File 20240121_014734_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-21T01:47:37.000.000.000 to 2024-01-21T01:47:37.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240121_014734_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0389E520 004D17B0 006B9C60 025E5250 01717B70 00E4E360 034B4960 027776E0 02A666C0 03FAAAD0 0007FFB0
      0007FFB0 00040060 02060050 01050070 01878040 01444060 03E66050 00155070 001FF840 02080230 03860190
      03860190 00450150 026781F0 03544100 02FE6180 03815140 0241F9E0 01610510 03D18790 00394450 0112F330
      0112F330 02CDC550 01AB27F0 017EB400 01C1EE00 01211900 01B19580 01695F40 01DDF0E0 03330890 00AA8CD0
      00AA8CD0 017FE550 01E00BF0 01100E00 01980900 01540D80 01FE0B40 01010EE0 03818990 00414D50 0261EBF0
      0261EBF0 03511E00 017CC880 00E15660 0291FD50 01D903F0 01358200 01AF4300 0178E280 01C493C0 0126DA20
      0126DA20 03B5B730 026F6CA0 00AC6D70 007D2DE0 0243BB10 01626690 03D355D0 003AFF30 002780A0 023440F0
      023440F0 032E6080 02B950C0 03E5F8A0 000B8270 000721A0 0204B170 0306E9C0 02859D20 01C753B0 0124FA60
      0124FA60 03B68750 006DC4F0 005B2680 0076B5C0 0226F790 029AC620 01D7A530 013C77A0 03A24C70 02736A40
      02736A40 034ADF60 00EFB0D0
     
