-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Feb  3 21:02:58 2024 UTC
-- File 20240112_152129_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-12T15:21:32.000.000.000 to 2024-01-12T15:21:32.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240112_152129_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  014D98A0 03EB54F0 021EFE80 031181C0 034CA090 02757860 02A7E220 00FA0990 034386A0 00E245F0 00936700
      00936700 00DAD480 00B7BEC0 00EC61A0 029A5170 03D779C0 023CC520 0122A7B0 02D9FA30 03DA8390 0037C250
      0037C250 022C2370 033A32C0 02A72BA0 01F4BE70 010EE140 018991E0 034D5910 00EBF590 034F07A0 00744230
      00744230 004E6320 026952B0 035DFBE0 00F30610 028A8510 01CFC790 03282450 00BC3670 00E22D40 02499DF0
      02499DF0 01B6A980 016DFD40 01DB03E0 03368210 00ADC310 02FB2290 0186B3D0 0345EA30 02E71F20 019490B0
      019490B0 02AF6C70 01FC6D20 03025BB0 02837660 01C2CD50 0323ABF0 02B27E00 03EB4100 021EE180 03119140
      03119140 029959E0 02EAFA80 01CFC3E0 03282210 00BC3310 02E22A90 01933FD0 035AA030 02F7F020 018C0830
      018C0830 014A0C20 03EF0A30 030C4790 02453220 0167AB30 01D47EA0 033E41F0 02A16100 03F1D180 02093940
      02093940 030DA5E0 008B7710 02CECC90 02D4D560 02DF5FE0 01B0F010 03688810 00DCCC10 02B2AA10 01EBFF10
      01EBFF10 031E0090 009100D0
     
