-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Feb  3 20:51:28 2024 UTC
-- File 20240112_085239_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-12T08:52:42.000.000.000 to 2024-01-12T08:52:42.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240112_085239_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00DA6560 02B757D0 01ECFC30 028D4110 02E5F0C0 03CB8450 002E4670 00396540 0025D7E0 02373C10 012CA210
      012CA210 03BAF310 00678A90 02544FD0 017E6830 02E0AE10 02C87C80 03AC42C0 027A63A0 01475270 01E4FB40
      01E4FB40 011686E0 039DC590 00532750 027AB4F0 0347EE80 01720CE0 03E58540 021747E0 011CE410 03929610
      03929610 005BDD10 02763390 014D2A50 03EBBF70 021E60C0 031150A0 004CFC70 00354120 022FE1B0 03381160
      03381160 00A419D0 02F61530 038D1FA0 004B9070 006E5840 00597460 0275CE50 00A794B0 027A2F70 034738C0
      034738C0 02E4A4A0 0196F6F0 015D8D80 01F34B40 010AEEE0 038F9990 00485550 026C7FF0 01AD2000 00BDD800
      00BDD800 00E33400 0092AE00 00DBF900 00B60580 00ED0740 009B84E0 02D64690 01BD65D0 0363D730 03691E50
      03691E50 006EC8B0 0059ACE0 02757A90 014FC7D0 03E82430 021C3620 01122D30 019B3BA0 0356A670 02FDF540
      02FDF540 03C187F0 0110A200 0198F300 01548A80 01FECFC0 0101A820 03817C30 0241C220 01612330 01D1B2A0
      01D1B2A0 03396BF0 0152EF00
     
