-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Feb  3 12:51:01 2024 UTC
-- File 20240101_230029_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-01T23:00:32.000.000.000 to 2024-01-01T23:00:32.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240101_230029_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00CA3220 02AF2B30 03F8BEA0 0004E1F0 00069100 0005D980 00073540 0004AFE0 03037C00 01416100 00F0E8C0
      00F0E8C0 00889CA0 02CCD2F0 03AABB80 027FE640 03401560 00E01FD0 02901030 03D81820 00341430 02170F10
      02170F10 028E4440 03C96660 002DD550 023B3FF0 0326A000 02B5F000 03EF0800 02188C00 0314CA00 029EAF00
      029EAF00 01E8FC40 028E4130 03C961A0 002DD170 003B39C0 0026A520 0235F7B0 032F0C60 00B88A50 02E4CF70
      02E4CF70 0396A8C0 032EFE50 005CC0B0 0072A0E0 024BF090 016E08D0 03D90CB0 02358AE0 012F4F90 03B8E850
      03B8E850 00649C70 0056D240 023EDDB0 0390D9B0 0258B560 0174EFD0 03CE9830 0229D420 013D3E30 01A3A120
      01A3A120 037271B0 02CB4960 01AEEDD0 01BCCD90 03B155A0 0069FF70 005D00C0 007380A0 024A40F0 036F6080
      036F6080 02D8D0C0 03B4B8A0 006EE4F0 00599680 003AAEE0 0313FCC0 029A02A0 01D703F0 013C8200 01A2C300
      01A2C300 0173A280 01CA73C0 012F4A20 03B8EF30 026498A0 00AB6A70 007F6FA0 0240D870 0360B440 02D0EE60
      02D0EE60 01B89950 0364D5F0
     
