-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Feb  3 12:50:29 2024 UTC
-- File 20240101_224334_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-01T22:43:37.000.000.000 to 2024-01-01T22:43:37.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240101_224334_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02EB34A0 019EAEF0 0151F980 01F90540 010587E0 03874410 0044E610 02669510 0155DF90 03FF9820 00002A10
      00002A10 03001F80 01400820 01F00610 03080510 008C0790 02CA0450 01AF0670 01788540 01C4C7E0 0326A410
      0326A410 00B5F610 02EF0D10 02CC45C0 03D53390 003FAA50 02207F70 033040C0 02A860A0 01FC50F0 01027880
      01027880 018344C0 0142E6A0 03E395F0 01092F80 00C6DC20 02A5B230 03F76B20 000CDEB0 000AB1E0 020FE910
      020FE910 01081D90 038C1350 004A1AF0 006F1780 002C4E20 011D3490 0393AED0 005A79B0 00774560 024CE7D0
      024CE7D0 016A9430 01DFDE20 03303130 02A829A0 01FC3D70 008111E0 0360CC80 02D0AAC0 03B8FFA0 00648070
      00648070 0056C040 007DA060 02437050 0162C870 01D3AC40 013A7A60 03D3A3A0 001D3930 0013A5A0 021A7770
      021A7770 03174CC0 029CEAA0 01D29FF0 013BD000 01A63800 01752400 01CFB600 00943680 006F16E0 02589D90
      02589D90 0174D350 03CEBAF0 0229E780 033D1440 02A39E60 01F25150 030B79F0 028EC500 01E4D3C0 028B5D10
      028B5D10 01CEF390 03298A50
     
