-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Feb  3 12:23:32 2024 UTC
-- File 20240101_074648_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-01T07:46:51.000.000.000 to 2024-01-01T07:46:51.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240101_074648_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03DFFA80 023007C0 03280420 00BC0630 00E20520 014983D0 01F6A110 0386F8C0 0322C250 0059D1B0 00753960
      00753960 024FA5D0 01687730 01DC4CA0 03326AF0 02AB5F80 03FEF040 02018860 01014C50 01C0F530 029047D0
      029047D0 01D86430 01345620 03AE7D30 027943A0 0145E270 01E71340 01149AE0 039ED790 0051BC50 013CB130
      013CB130 02D174D0 01B9CEB0 016529E0 03D7BD10 003C6390 02225250 01337B70 01AAC6C0 017FA5A0 03C07770
      03C07770 01102660 03CC1AA0 002A17F0 003F1C00 00209200 0030DB00 0028B680 003CEDC0 00229B20 0233D6B0
      0233D6B0 032A3DE0 025F9180 01B82CA0 03643AF0 02D62780 03BD3440 0263AE60 01527950 03FB45F0 0206E700
      0206E700 03059480 02875EC0 03E278D0 0009A250 020D7370 030BCAC0 028E2FA0 01C93870 012DA440 01BB7660
      01BB7660 0366CD50 00D5ABF0 00BF7E00 00706080 00242860 02363C50 012D2270 01BBB340 01666AE0 03D55F90
      03D55F90 003FF050 02200870 03300C40 02A80A60 02FE07A0 00C08230 00A0C320 02F0A2B0 0388F3E0 004C8A10
      004C8A10 026ACF10 015FA890
     
