-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Feb  3 12:20:17 2024 UTC
-- File 20240101_054830_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-01T05:48:33.000.000.000 to 2024-01-01T05:48:33.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240101_054830_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0321A7F0 02B17400 03E9CE00 021D2900 0313BD80 029A6340 03D752E0 003CFB90 02228650 0133C570 01AA27C0
      01AA27C0 017F3420 03C0AE30 0220F920 013085B0 01A8C760 03BE5260 00617B50 0251C6F0 03792580 02C5B740
      02C5B740 03A76CE0 0074DA90 024EB7D0 0169EC30 01DD1A20 0199CB90 03AA9720 007FDCB0 004032E0 02602B90
      02602B90 01503E50 03F82170 020431C0 03062920 00853DB0 00C7A360 03523960 027D92E0 01435B90 03E2F650
      03E2F650 00138D70 001A4BC0 00176E20 021CD930 0312B5A0 009BEF70 00D618C0 025E8A50 00B8E7B0 00E49460
      00E49460 0296DE50 01DDB170 013369C0 01AADD20 037FB3B0 02C06A60 01A05F50 037070F0 01642440 02EB1B30
      02EB1B30 039E96A0 0051DDF0 00793300 0045AA80 00677FC0 0054C020 027EA030 0341F020 00E10830 0248C610
      0248C610 02B65280 03ED7BC0 021BC620 01162530 019D37A0 0353AC70 02FA7A40 03874760 0044E4D0 026696B0
      026696B0 03AAEEF0 013FCCC0 01A02AA0 03703FF0 02C82000 03AC3000 027A2800 03473C00 02E4A200 0396F300
      0396F300 025D8A80 01B9A7E0
     
