-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Feb  3 12:12:45 2024 UTC
-- File 20240101_015601_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-01-01T01:56:04.000.000.000 to 2024-01-01T01:56:04.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240101_015601_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  022C87B0 033AC460 00A7A650 02F47570 01C727E0 0324B410 00B6EE10 02ED9910 019B5590 0356FF50 00FD80F0
      00FD80F0 00834080 00C2E0C0 00A390A0 01792C70 00E2DD20 0293B3B0 03DA6A60 00375F50 022CF0F0 033A8880
      033A8880 02A7CCC0 03F42AA0 000E3FF0 00092000 0006D800 0002DA00 0003B700 00026C80 00035AC0 0002F7A0
      0002F7A0 02038C70 03024A40 02836F60 01C2D8D0 0323B4B0 03593770 017AD660 03C7BD50 002463F0 00365200
      00365200 002D7B00 003BC680 002625C0 00353720 022FACB0 03387AE0 025223C0 03BD9910 00635590 0252FF50
      0252FF50 017B80F0 01C64080 012560C0 01B7D0A0 036C38F0 02DA2480 03B736C0 033656D0 0056BED0 027DE1B0
      027DE1B0 03431160 00E299D0 0293D530 03DA3FA0 00372070 002CB040 003AE860 02279C50 009A2930 026B9ED0
      026B9ED0 015E51B0 01F17960 0309C5D0 008D2730 00CBB4A0 02AE6EF0 03F95980 0205F540 03070FE0 02424400
      02424400 01B1B300 01696A80 01DDDFC0 01333020 03AAA830 027FFC20 01400230 01E00320 031002B0 029803E0
      029803E0 02EA0100 01CF80C0
     
