-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Feb  3 08:07:58 2024 UTC
-- File 20231227_013424_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-12-27T01:34:27.000.000.000 to 2023-12-27T01:34:27.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231227_013424_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02D72F50 01BCB8F0 0162E480 01D396C0 013A5DA0 03A77370 0274CAC0 03A757D0 003A7E10 02274110 0134E190
      0134E190 03AE9150 0079D9F0 00453500 0067AF80 00547840 007E4460 02416650 00B0EAB0 02744FF0 034E6800
      034E6800 02E95C00 039DF200 02530B00 037A8E80 02C7C9C0 03A42D20 00763BB0 004D2660 0335DAA0 00579BF0
      00579BF0 007C5600 00427D00 00634380 0052E240 007B9360 02465AD0 016577B0 01D7CC60 033C2A50 00511FB0
      00511FB0 023CC830 0322AC20 00B3FA30 00EA0720 029F04B0 03D086E0 0038C590 0224A750 0136F4F0 01AD8E80
      01AD8E80 00BDA4E0 0371BB40 02C966E0 01ADD590 037B3F50 00C6A0F0 00A5F080 00F708C0 008C8CA0 02CACAF0
      02CACAF0 03AFAF80 013C3C20 01D11110 03399990 00A55550 02F7FFF0 038C0000 024A0000 036F0000 02D88000
      02D88000 03B4C000 026EA000 01ACF800 00BD4200 00E3E300 00921280 00DB1BC0 00B69620 02EDDD30 039B33A0
      039B33A0 0056AA70 007DFF40 004300E0 03314040 0354F030 02FE8820 0181CC30 01412A20 03E1BF30 021160A0
      021160A0 0119D0F0 01953880
     
