-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Feb  3 06:28:30 2024 UTC
-- File 20231224_172927_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-12-24T17:29:30.000.000.000 to 2023-12-24T17:29:30.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231224_172927_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02FFEF00 01C00C40 01200A60 03B00F50 006808F0 005C0C80 00720AC0 004B0FA0 026E8870 0359CC40 02F52A60
      02F52A60 02C7DFA0 00D21830 00BB1420 02E69E30 0395D120 005F39B0 0070A560 0248F7D0 016C8C30 01DACA20
      01DACA20 0337AF30 03563C50 007E9130 0041D9A0 02613570 0351AFC0 02F97820 0185C430 01472620 03E4B530
      03E4B530 0216EFA0 011D9870 00C9AA20 0156BF90 03FDE050 00031070 00029840 0003D460 02023E50 01032170
      01032170 0182B1C0 0143E920 03E21DB0 030989B0 0346A6B0 02E5F5E0 01970F10 035C8890 00F2CCD0 028BAAB0
      028BAAB0 03CE7FE0 00294010 023DE010 01231010 03D94C00 011AF500 01978F80 015C4840 01F26C60 030B5A50
      030B5A50 008EF770 00C98CC0 00AD4AA0 02FBEFF0 03861800 01228A00 00D9E780 00B51440 00EF9E60 02985150
      02985150 01D479F0 013E4500 01A16780 0171D440 01C93E60 032DA150 005DB8F0 0039B240 00256B60 0237DED0
      0237DED0 012C31B0 01BA2960 03673DD0 00D4A330 00BEF2A0 02E18BF0 03914E00 012CF480 00DD4760 02B3E4D0
      02B3E4D0 01EA16B0 011F1DE0
     
