-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Feb  3 06:08:34 2024 UTC
-- File 20231224_084318_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-12-24T08:43:21.000.000.000 to 2023-12-24T08:43:21.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231224_084318_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  010D8C30 018B4A20 034EEF30 02E998A0 019D54F0 0153FE80 01FA01C0 01070120 01C240D0 0191B050 03596870
      03596870 02F5DC40 038F3260 0048AB50 026CFEF0 035A8180 02F7C140 038C21E0 004A3110 033794C0 03562F50
      03562F50 00FD38F0 0083A480 00C276C0 00A34DA0 02F2EB70 038B9EC0 024E51A0 01697970 01DDC5C0 02999390
      02999390 02EAAD20 019FFBB0 01500660 03F80550 000407F0 00060400 00050600 00078500 00044780 00066440
      00066440 0202AB30 0381FF50 004100F0 00618080 005140C0 0079E0A0 024510F0 03679880 02D454C0 03BE7EA0
      03BE7EA0 006141F0 0028F080 001E4460 02116650 0119D570 01953FC0 015FA020 03F07030 02084820 010C6C30
      010C6C30 018A5A20 034F7730 03746650 00672AB0 0054BFE0 027EE010 01419010 03E15810 0011F410 02190E10
      02190E10 01158910 039F4D90 0050EB50 013C4F70 00D13460 02B9AE50 01E57970 0117C5C0 019C2720 035234B0
      035234B0 02FB2EE0 0186B990 0345E550 00E717F0 004A4E00 0037B480 002C6EC0 003A59A0 02277570 0334CFC0
      0334CFC0 02AEA820 01F9FC30
     
