-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Feb  3 05:07:17 2024 UTC
-- File 20231223_141827_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-12-23T14:18:30.000.000.000 to 2023-12-23T14:18:30.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231223_141827_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03A95F40 027DF0E0 01430890 03E28CD0 0013CAB0 001A2FE0 02173810 011CA410 0392F610 022DC680 019D92E0
      019D92E0 03535B90 00FAF650 02878D70 03C44BC0 02266E20 01355930 01AFF5A0 03780F70 02C408C0 03D30650
      03D30650 001D42B0 0013E3E0 021A1210 01171B10 039C9690 0052DDD0 027BB330 03466AA0 00E55FF0 0097F000
      0097F000 006E0400 002C8300 003AC280 0027A3C0 00347220 022E4B30 03396EA0 00A5D9F0 00F73500 008CAF80
      008CAF80 00CAF840 0257C230 03BE1190 00611950 025195F0 03795F00 02C5F080 03A708C0 02748CA0 014ECAF0
      014ECAF0 01E9AF80 011D7840 02C9E230 03D68990 003DCD50 02232BF0 0332BE00 02ABE100 03FE1180 02011940
      02011940 030195E0 00815F10 02C1F090 02D08460 02DC6320 01B252B0 016B7BE0 03DEC610 0031A510 02297790
      02297790 013DCC50 03A32A70 0272BF40 034BE0E0 02770840 03A64630 02756520 014FD7B0 01E83C60 031C2250
      031C2250 00923370 00DB2AC0 00B6BFA0 02EDE070 039B1040 032B4C30 035F7510 00F0CF90 0288A850 01CCFC70
      01CCFC70 012A8240 01BFC360
     
