-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Feb  3 04:53:39 2024 UTC
-- File 20231223_140112_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-12-23T14:01:15.000.000.000 to 2023-12-23T14:01:15.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231223_140112_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  005DF730 00730CA0 024A8AF0 01B7E7C0 02B60A10 02F68780 01C6E220 03259330 02B75AA0 01ECF7F0 011A8C00
      011A8C00 0197CA00 015C2F00 01F23880 010B24C0 018EB6A0 01A4F6F0 00BB46C0 00E6E5A0 02959770 03DF5CC0
      03DF5CC0 0230F2A0 01288BF0 01BCCE00 0162A900 01D3FD80 013A0340 02D38170 01DD20E0 0333B090 00AA68D0
      00AA68D0 02FF5CB0 0380F2E0 00408B90 0260CE50 0150A970 01F8FDC0 01048320 01C36150 019168F0 0159DC80
      0159DC80 01F532C0 010FABA0 03887E70 024C4140 036A61E0 00DF5110 02B0F990 01E88550 018E63F0 00A4A900
      00A4A900 00F6FD80 008D8340 00CB42E0 02AEE390 01F99250 03055B70 0287F6C0 03C40DA0 00260B70 001A8760
      001A8760 030BE260 008E1350 02C91AF0 03AD9780 027B5C40 0346F260 00E58B50 02974EF0 03DCE980 02329D40
      02329D40 0395E9F0 012F8E80 01B849C0 01646D20 03D65BB0 023D7660 0123CD50 03B22BF0 026B3E00 035EA100
      035EA100 02F1F180 01C484A0 01936370 015AD2C0 01F7BBA0 030C6670 028A5540 03CF7FE0 0028C010 023CA010
      023CA010 0122F010 03B38810
     
