-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Feb  1 18:05:32 2024 UTC
-- File 20231028_200031_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-28T20:00:34.000.000.000 to 2023-10-28T20:00:34.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231028_200031_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0066F070 00558840 007F4C60 0240EA50 01609F70 00E86860 034E2E20 00E93930 009DA5A0 02D37770 03BACCC0
      03BACCC0 0267AAA0 01547FF0 01FE4000 01016000 0181D000 00A09C00 00786900 00445D80 00667340 00554AE0
      00554AE0 027FEF90 01401850 03E01470 02101E40 03181160 009419D0 016F0A90 03EC47E0 001A6410 02175610
      02175610 011CFD10 03928390 005BC250 02762370 034D32C0 02EBABA0 019E7E70 00A8A0A0 017E7870 01C14440
      01C14440 0121E660 03B11550 00699FF0 005D5000 0073F800 004A0400 006F0600 00588500 003A63C0 0213A910
      0213A910 011A7D90 03974350 005CE2F0 00729380 004BDA40 006E3760 02592CD0 0175BAB0 01CF67E0 03946A00
      03946A00 012F2F80 01B8B840 0164E460 03D69650 003DDD70 002333C0 0032AA20 022BFF30 033E00A0 00A100F0
      00A100F0 0078C040 02225030 03337820 00AAC430 00FFA620 02807530 03C04FA0 00206870 00305C40 00287260
      00287260 023C4B50 00913770 006CD660 025ABD50 0177E3F0 01CC1200 012A1B00 01BF1680 01609DC0 01D0D320
      01D0D320 0338BAB0 02A4E7E0
     
