-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Feb  1 04:07:18 2024 UTC
-- File 20231027_224300_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-27T22:43:03.000.000.000 to 2023-10-27T22:43:03.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231027_224300_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0398A610 0054F510 027E8F90 02A0E420 00F84B10 03423740 03719670 02C95D40 03ADF3E0 007B0A10 02468F10
      02468F10 0165C890 03D72CD0 003CBAB0 0022E7E0 02339410 02952F00 01EFDC40 01183260 03942B50 005E3EF0
      005E3EF0 00712180 0049B140 006D69E0 025BDD10 01763390 03CD2A50 0015DFB0 020F9830 03085420 008C7E30
      008C7E30 00CA4120 02AF61B0 03F8D160 0004B9D0 0206E530 030597A0 00875C70 00627920 0129A2D0 03BD73B0
      03BD73B0 0263CA60 01522F50 03FB38F0 0206A480 0305F6C0 02870DA0 01C48B70 0126CEC0 02DAD4D0 00DBDF50
      00DBDF50 02B630F0 03ED2880 021BBCC0 031662A0 009D53F0 00D3FA00 00BA0700 00E70480 009486C0 026F62D0
      026F62D0 00AC69D0 02FA5D30 038773A0 0044CA70 0066AF40 0055F8E0 027F0490 014086D0 03E0C5B0 0210A760
      0210A760 028C7A60 02E523A0 0197B270 015C6B40 01F25EE0 030B7190 008EC950 02C9ADF0 03AD7B00 027BC680
      027BC680 034625C0 03729B90 0265EB20 01571EB0 01FC91E0 0302D910 0083B590 02C26F50 01A358F0 0172F480
      0172F480 01CB8EC0 012E49A0
     
