-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Feb  1 04:04:18 2024 UTC
-- File 20231027_223855_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2023-10-27T22:38:58.000.000.000 to 2023-10-27T22:38:58.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20231027_223855_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  027C2B50 01423EF0 01E32180 0112B140 019BE9E0 03561D10 027E89C0 03A0E690 02384AE0 029237C0 03ED9610
      03ED9610 001B5D10 0216F390 011D8A50 03934F70 025AE8C0 03779CA0 00CC52F0 00AA7B80 00FF4640 024072B0
      024072B0 03B025F0 02683700 035C2C80 02F23AC0 038B27A0 004EB470 0069EE40 005D1960 027395D0 014A5F30
      014A5F30 02F7B850 00C63230 00A52B20 02F7BEB0 038C61E0 004A5110 026F7990 0158C550 03F4A7F0 020EF400
      020EF400 03098E00 0146A480 00F2FB60 028B86D0 01CE45B0 01296760 03BDD4D0 00633EB0 0052A1E0 027BF110
      027BF110 01460990 03E50D50 000BC5F0 00071380 00049A40 0006D760 0205BCD0 010762B0 0184D3E0 0346BA10
      0346BA10 00E5E710 02971490 01DC9ED0 019968D0 01AAEE50 037F9970 02C055C0 03A07F20 007040B0 004860E0
      004860E0 026C5090 015A78D0 03F744B0 020CE6E0 02854AC0 03E3F7D0 00120C30 001B0A20 02168F30 031DC8A0
      031DC8A0 00932CF0 00DABA80 00B7E7C0 00EC1420 029A1E30 03EB8890 020F2660 0108B550 038CEFF0 024A9800
      024A9800 036FD400 02D83E00
     
